2016년 3월 8일 화요일

https://quequero.org/2014/04/introduction-to-arm-architecture/

https://quequero.org/2014/04/introduction-to-arm-architecture/

The A64 Register

A64 has 31 general-purpose registers (integer) more the zero register and the current stack pointer register, here all the registers:
Wn32 bitsGeneral-purpose register: n can be 0-30
Xn64 bitsGeneral-purpose register: n can be 0-30
WZR32 bitsZero register
XZR64 bitsZero register
WSP32 bitsCurrent stack pointer
SP64 bitsCurrent stack pointer
reg
How registers should be using by compilers and programmers:
  • r30 (LR): The Link Register, is used as the subroutine link register (LR) and stores the return address whenBranch with Link operations are performed.
  • r29 (FP): The Frame Pointer
  • r19…r28: Callee-saved registers
  • r18: The Platform Register, if needed; otherwise a temporary register.
  • r17 (IP1): The second intra-procedure-call temporary register (can be used by call veneers and PLT code); at other times may be used as a temporary register.
  • r16 (IP0): The first intra-procedure-call scratch register (can be used by call veneers and PLT code); at other times may be used as a temporary register.
  • r9…r15: Temporary registers
  • r8: Indirect result location register
  • r0…r7: Parameter/result registers
The PC (program counter) has a limited access, only few instructions, as BL and ADL, can modify it.

The use of Stack

The stack implementation is full-descending: in a push the stack pointer is decremented, i.e the stack grows towards lower address.
Another features is that stack must be quad-word aligned: SP mod 16 = 0.
A64 instructions can use the stack pointer only in a limited number of cases:
  • Load/Store instructions use the current stack pointer as the base address: When stack alignment checking is enabled by system software and the base register is SP, the current stack pointer must be initially quadword aligned, That is, it must be aligned to 16 bytes. Misalignment generates a Stack Alignment fault.
  • Add and subtract data processing instructions in their immediate and extended register forms, use the current stack pointer as a source register or the destination register or both.
  • Logical data processing instructions in their immediate form use the current stack pointer as the destination register.

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