2016년 2월 19일 금요일

Table 3.7. ADC, ADD, RSB, SBC and SUB operand restrictions
InstructionRdRnRmimmRestrictions
ADCSR0-R7R0-R7R0-R7-
Rd and Rn must specify the same register.
ADDR0-R15R0-R15R0-R15-
Rd and Rn must specify the same register.
Rn and Rm must not both specify the PC (R15).
R0-R7SP or PC-0-1020
Immediate value must be an integer multiple of four.
SPSP-0-508
Immediate value must be an integer multiple of four.
ADDSR0-R7R0-R7-0-7-
R0-R7R0-R7-0-255
Rd and Rn must specify the same register.
R0-R7R0-R7R0-R7--
RSBSR0-R7R0-R7---
SBCSR0-R7R0-R7R0-R7-
Rd and Rn must specify the same register.
SUBSPSP-0-508
Immediate value must be an integer multiple of four.
SUBSR0-R7R0-R7-0-7-
R0-R7R0-R7-0-255
Rd and Rn must specify the same register.
R0-R7R0-R7R0-R7--

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